IEC 61131-3 Memory Offset Mapper
Lay out PLC variable offsets with vendor-specific alignment rules and export tag data.
Architecture & Controls
Generated Memory Map
Memory map is empty. Add variables from the control panel.
⚠️ Engineering Caution:
This tool is intended for screening and pre-check workflows. Results are usually directionally useful, but they
can still shift with equipment selection, environmental conditions, naming conventions, revision status, or
interpretation rules. Confirm any value that affects ordering, substitution, compliance, or installation before
acting on it.
IEC 61131-3 Memory Architecture
The IEC 61131-3 standard defines the programming languages and data models for programmable logic controllers. Memory mapping involves calculating exact byte offsets for variables in contiguous data blocks, respecting alignment rules specific to each PLC manufacturer.
Manufacturer-Specific Architectures
Different PLC manufacturers implement distinct memory alignment rules: Siemens uses 2-byte alignment for S7-1500, Rockwell uses 4-byte alignment, Mitsubishi uses 16-bit D-Register mapping, and the IEC standard defines its own generic alignment scheme.